Copper anode for semiconductor interconnects

ABSTRACT

A copper anode is described for use in electroplating semiconductor interconnects, where said anode has a preferred grain size or crystallographic orientation and a preferred chemical composition. The microstructure of the anode may be of two types (1) grains smaller than 100 microns in any dimension or (2) large columnar grains aligned perpendicularly to the anode corroding surface. Copper cathodes of not less than 99.99 weight percent of copper are alloyed to achieve an anode with a phosphor content of 0.045 to 0.060 weight percent.

FIELD OF THE INVENTION

[0001] The present invention relates generally to copper anodes and more specifically, it relates to copper anodes having a preferred grain size or orientation and preferred chemical composition to provide a more effective copper electroplating of semiconductor interconnects on silicon wafers.

BACKGROUND OF THE INVENTION

[0002] Advances in semiconductor manufacturing technology have led to the development of integrated circuits having multiple levels of interconnect. In such an integrated circuit, patterned conductive material on one interconnect level is electrically insulated from patterned conductive material on another interconnect level by films of material such as, for example, silicon dioxide. These conductive materials are typically a metal or metal alloy. Connections between the conductive material at the various interconnect levels are made by forming openings in the insulating layers and providing an electrically conductive structure such that the patterned conductive material from different interconnect levels are brought into electrical contact with each other. These electrically conductive structures are often referred to as contacts or vias.

[0003] An electroplating process may be used in manufacturing semiconductor devices. Metal interconnect structures are formed on a silicon substrate, such as a silicon wafer, to provide electrical connections between transistors. Trenches are formed in the silicon substrate for depositing metal used to form the interconnect structures. Typically, a barrier layer and a seed layer of metal is then deposited on the silicon substrate. The silicon substrate is then immersed into an electroplating process chamber containing an electrolyte solution. Typically, an anode is then positioned in the electrolyte solution and a cathode is coupled to the silicon substrate for providing an electrical current. The electric current, electrolyte solution, and substrate then react to form a metal layer on the substrate surface, including in the trenches of the silicon substrate. Conductive process chamber contacts or fingers are typically used to position the silicon substrate in the electrolyte solution. These contacts may also be used to provide a current path.

[0004] Other advances in semiconductor manufacturing technology, such as the ability to repeatably pattern very small features, have led to the integration of millions of transistors, each capable of switching at high speed. A consequence of incorporating so many fast switching transistors into an integrated circuit is an increase in power consumption during operation. One technique for increasing speed while reducing power consumption is to replace the traditional aluminum and aluminum alloy interconnects found on integrated circuits with a metal such as copper, which offers lower electrical resistance. Those skilled in the electrical arts will appreciate that by reducing resistance, electrical signals may propagate more quickly through the interconnect pathways on an integrated circuit. Furthermore, because the resistance of copper is significantly less than that of aluminum, the cross-sectional area of a copper interconnect line, as compared to an aluminum interconnect line, may be made smaller without incurring increased signal propagation delays based on the resistance of the interconnect. Additionally, because the capacitance between two electrical nodes is a function of the overlap area between those nodes, using a smaller copper interconnect line results in a decrease in parasitic capacitance. In this way, replacing aluminum-based interconnects with copper-based interconnects provides, depending on the dimensions chosen, reduced resistance, reduced capacitance, or both. Such interconnects are often formed using a electrodeposition technique in which copper is deposited onto the chip from a copper anode in an electrochemical process.

[0005] As noted above, copper has electrical advantages, such as lower resistance per cross-sectional area, the ability to provide for reduced parasitic capacitance, and greater immunity to electromigration. For all these reasons manufacturers of integrated circuits find it desirable to include copper in their products.

[0006] It can be appreciated that copper anodes have been in use for years, employed in plating on metals and plastics. Particularly, copper anodes are useful in the electroplating of silicon wafers in the manufacturing of semiconductive chips as discussed above. In such processes, copper is deposited from the anode onto the chip to form copper interconnects between transistors on the chips. Methods for electroplating silicon wafers for forming semiconductive chips are detailed in U.S. Pat. No. 5,882,498, the disclosure of which is incorporated herein by reference.

[0007] Typically, commercially available copper anodes are suitable for most general electroplating requirements, but possess a grain size, grain orientation and composition that make them undesirable for, the electroplating of semiconductor interconnects, where the interconnect dimensions may be on the order of 15 microns. In interconnect formation, a very fine and controlled deposition of electroplated copper is required to form these delicate structures which is difficult to achieve using conventional copper anodes.

[0008] The main problem with conventional copper anodes is the relatively large grain size and orientation. This may lead to the creation of voids or inclusions in the semiconductor interconnects, which limit current flow and may cause interconnects to fail. Another problem with conventional anodes is the impurity levels and the lack of close control of alloy ingredients. Such impurities may reduce the current density in the anode grain boundaries, leading to the formation of sludge in the form of cuprous ions in the plating bath. This in turn will reduce the conducting properties of the copper interconnects.

[0009] Thus, a copper anode that reduces or eliminates these problems in the formation of copper interconnects on semiconductor chips by controlling the grain size, orientation and chemical composition of the copper anode is needed.

SUMMARY OF THE INVENTION

[0010] In view of the foregoing disadvantages inherent in the known types of copper anodes now present in the prior art, the present invention provides a new copper anode for semiconductor interconnect construction, wherein the anode can be utilized for the production of semiconductor interconnects using a preferred copper anode with preferred grain size, grain orientation and chemical composition.

[0011] Thus, the present invention provides a copper anode for the electroplating of semiconductor interconnects having a preferred microstructure, orientation and chemical composition.

[0012] In one aspect, the present invention provides a copper anode for the electroplating of semiconductor interconnects wherein the copper grain size in the anode is less than 100 microns.

[0013] In a second aspect, the present invention provides a copper anode for the electroplating of semiconductor interconnects wherein the copper grains in the anode are oriented so as to be aligned perpendicular to a corroding surface of the anode.

[0014] In a third aspect, the present invention provides a copper anode for the electroplating of semiconductor interconnects wherein the anode is manufactured from a copper cathode having a purity of at least 99.99% and wherein the final anode has a phosphor content of between 0.045 and 0.060 weight percent.

[0015] In a fourth aspect, the present invention provides a method for electroplating copper on a semiconductor wafer using a copper anode, wherein at least one of the following conditions are satisfied:

[0016] a) the anode has a copper grain size of less than 100 microns;

[0017] b) the copper grains in the anode are oriented so as to be aligned perpendicular to a corroding surface of the anode; and

[0018] c) the anode has a phosphor content of between 0.045 and 0.060 weight percent and is formed from a copper cathode comprising at least 99.99% copper and.

BRIEF DESCRIPTION OF THE DRAWINGS

[0019]FIG. 1 is a cross-section view of a patterned semiconductor wafer having a barrier layer, a formed copper seed layer over the barrier layer, and a formed copper fill layer.

[0020]FIG. 2 is a schematic drawing of a semiconductor wafer electroplating apparatus.

[0021]FIG. 3 is a schematic view of a copper anode according to the present invention operating during the electroplating of a semiconductor interconnect.

[0022]FIG. 4 is a schematic view of a poorly corroding commercial grade copper anode operating during the electroplating of a semiconductor interconnect.

DETAILED DESCRIPTION OF THE INVENTION

[0023] In the following description, numerous details, for example, specific materials, process steps, and so on, are set forth in order to provide a thorough understanding of the present invention. It will be obvious, however, to one skilled in the art of the specific details which need not be employed to practice the present invention. Moreover, specific details of particular processes or structures may not be specifically presented in order to not unduly obscure the invention where such details would be readily apparent to one of average skill in the art.

[0024] The present invention finds application in, inter alia, the formation of semiconductor chips via the electrodeposition of copper on a silicon substrate or wafer. FIG. 1 illustrates a cross-section of a processed silicon wafer 100 having trenches 104 and vias 102 formed from damascene or dual damascene processes. A barrier layer 105 is typically deposited over the wafer 100 and into the via holes 102 and trenches 104. This barrier layer is typically a tantalum material, but may be made of other materials such as tungsten or chromium. A copper seed layer 106 is then deposited over the barrier layer 105 so as to line the inner walls and surfaces with in the via holes 102 and trenches 104. The copper seed layer is needed to promote good adhesion and establish a good electrical contact between copper interconnect lines. The copper seed layer 106 is typically deposited using either a chemical vapor deposition (CVD) technique or a physical vapor deposition (PVD) technique. Once the copper seed layer 106 is deposited, the wafer is immersed in an electroplating solution and a bulk copper 108 is deposited onto the seed layer 106 to fill the remainder of the via holes 102 and trenches 104.

[0025] In one embodiment, silicon substrate 100 illustrated in FIG. 1 may be positioned in an electrolyte solution contained in an electroplating processing chamber is illustrated in FIG. 2. In this system, a silicon wafer 200 is mounted on a rotating cathode 202 powered by an electric motor (not shown). The wafer 200 is mounted on the cathode 202 by sealed electrical contacts 204 and wafer clamps 206. Thus, the wafer 200 acts as the cathode for purposes of the electroplating process. A copper anode 208 is mounted oppositely facing the wafer 200. An electrolytic plating solution 210 is continuously circulated throughout the chamber. With the application of a current across the chamber from the anode to the cathode, cupric ions (Cu²⁺) are generated from an anode corroding surface 212 and deposited on the wafer 200 as elemental copper. The electrolyte solution 210 is preferably any commercially available sulfuric acid containing solution for electroplating copper, such as CUBATH™, available from Enthone-Omi. An electric field shaping ring 214 may be included to alter the path of the copper ions as they migrate toward the wafer 200. An anode filter 216 may also be used to prevent any solid contaminants from the copper anode from traveling to the wafer 200 and being deposited thereon.

[0026] The preferred copper anode according to the present invention possesses characteristics that improve the electroplating process described above. In one embodiment, the present invention provides a copper anode for the electroplating of semiconductor interconnects wherein the copper grain size in the anode is less than 100 microns.

[0027] In the first embodiment, the microstructure of the copper anode will have long columnar grains parallely aligned. Such a microstructure is obtained by using a vertical continuous casting method. In this method, the crystals grow upward toward the liquid metal while the cast copper billet is withdrawn from a water-cooled die. In this way, the copper grains are parallel to one another and are aligned along the billet axis. Copper anodes for the electroplating process are then trimmed from the billet so as to cut across the columnar grains. This trimmed surface is then positioned for use as the corroding surface of the anode in the assembly above, providing a corroding surface that is perpendicular to the long axis of the aligned grains. In this way, the grains are densest in the direction of growth and the corroding anode surface will always be covered with copper grains having substantially the same crystallographic orientation.

[0028] In a second embodiment, the present invention provides a copper anode for the electroplating of semiconductor interconnects wherein the microstructure of the copper anode is one where the grains are so small, the effects typically experienced with anodes having larger, nonaligned grains will be negated. In this case, the grain size is effected to be less than 100 microns in each of the x, y, and z dimensions. This grain size is small enough to negate the low current density in the grain boundaries of larger crystals and avoids the sludge formation in the plating bath arising from those boundaries. The preferred grain size in this case is also small enough to overcome the random crystal orientation of the anode. The microstructure of this version of a preferred copper anode for the electroplating of semiconductor interconnects is attained by a series of cold working and annealing cycles performed on a cast billet. Cold working may be done by any suitable means to effect a reduction in size of over 50%. The cold worked anode is annealed and cold worked until the preferred microstructure is attained after the last anneal.

[0029] Such a grain size is much smaller than the typical cast copper anode grain size, which is generally around 7,200 microns. It is also smaller than the typical hot rolled copper grain size of about 250 microns and a typical hot extruded copper grain size of about 200 microns.

[0030] In a third embodiment, the copper anode of the present invention is manufactured from a copper cathode having a purity of at least 99.99% and wherein the final anode has a phosphor content of between 0.045 and 0.060 weight percent.

[0031] Whether continuously cast or cycled through cold working and annealing, both preferred copper anodes may be made from the same melt procedures. In this process, a copper cathode of minimum 99.99 weight percent copper is melted in a coreless induction furnace lined with alumina or silicon carbide. The melt is covered with charcoal and held until the oxygen content is less than 50 parts per million. Phosphor is then added as, for example, 15% phosphorus-85% copper master alloy. The total impurity limit of the master alloy is preferably less than 0.1 weight percent other elements. The final phosphor content of the copper melt should be between 0.045 and 0.060 weight percent. After analyzing by inductively coupled plasma or atomic absorption the liquid metal is poured into a continuous casting machine to provide billet for either of the preferred microstructures, being the microstructure of the as cast billet or a microstructure attained by cycles of cold working said annealing. The preferred anode will be compatible with high purity sulfate electroplating bath solutions.

[0032] Such a composition is contrast to conventional copper anodes, which utilize copper plate material constituting oxygen-free copper or tough pitch copper for the soluble electrode. According to JIS H3100, the purity of these materials is 99.96% at the highest. Based on this, the amount of impurities contaminating the plating solution is as great as 0.5 g per 1.2 tons of copper deposit, calculated based on the assumption that the plating bath has been energized for 1 KAH (kilo-ampere-hour).

[0033] The operation of an anode according to one or more of the embodiments described above is illustrated in FIG. 3. It can be seen that the anode is corroding smoothly and that only cupric ions (Cu²⁺) are being produced at the anode surface. In contrast, FIG. 4 shows the electroplating of an interconnect using a conventional copper anode. It can be seen that the anode is corroding unevenly, and that cuprous ions (Cu⁺) form precipitating sludge that can enter the plating bath and contaminate the interconnect. Poorly corroding anodes produce sludge particles larger than the interconnects, thus causing breaks in the interconnect wiring. The two preferred microstructures and the preferred chemical composition will provide a copper anode for electroplating semiconductor interconnects, such anodes being capable of developing an adherent film on the anode corroding surface that inhibits the migration of cuprous ions which would form sludge.

[0034] While the preferred (inventive) copper anode is required for certain semiconductor electroplating baths, semiconductor, fabricators may require other copper anode compositions. The invention is intended to supply any copper anode composition, but the requirements for the two preferred types of microstructure will still be a necessary criterion for the best performance of copper anodes of various alloy content.

[0035] The invention has been described with reference to various embodiments. Variations in size, materials, shape, form, function, manner of operation, assembly and use will become apparent to one skilled in the art upon a reading of the specification. The invention is intended to include all such variations that do no depart from the scope of the invention as embodied in the accompanying claims and equivalents thereof. 

What is claimed is:
 1. A copper anode for the electroplating of a substrate wherein the copper grain size in the anode is less than 100 microns in any dimension.
 2. The copper anode of claim 1, wherein the substrate is a silicon wafer.
 3. The copper anode of claim 1, wherein the anode is formed from a copper billet using a series of cold working and annealing steps.
 4. The copper anode of claim 1, wherein the anode is manufactured from a copper cathode having a purity of at least 99.99% and wherein the anode has a phosphor content of between 0.045 and 0.060 weight percent.
 5. A copper anode for the electroplating of a substrate wherein the copper grains in the anode are parallel and columnar shaped and oriented so as to be aligned perpendicular to a corroding surface of the anode.
 6. The copper anode of claim 5, wherein the substrate is a silicon wafer.
 7. The copper anode of claim 5, wherein the anode is formed using a continuous casting process.
 8. The copper anode of claim 5, wherein the anode is manufactured from a copper cathode having a purity of at least 99.99% and wherein the anode has a phosphor content of between 0.045 and 0.060 weight percent.
 9. A copper anode for the electroplating of semiconductor interconnects wherein the anode is manufactured from a copper cathode having a purity of at least 99.99% and wherein the final anode has a phosphor content of between 0.045 and 0.060 weight percent.
 10. A copper anode according to claim 9, wherein the anode is either continuously cast or cold worked and annealed.
 11. A method for electroplating copper on a substrate using a copper anode, wherein at least one of the following conditions are satisfied: a) the anode has a copper grain size of less than 100 microns; b) the copper grains in the anode are oriented so as to be aligned perpendicular to a corroding surface of the anode; and c) the anode has a phosphor content of between 0.045 and 0.060 weight percent and is formed from a copper cathode comprising at least 99.99% copper.
 12. The method of claim 11, wherein said electroplating is conducted in a electroplating chamber including an electrolyte plating solution.
 13. The method of claim 11, wherein said substrate is a silicon wafer.
 14. The method of claim 12, wherein said substrate functions as a cathode and further wherein a current is applied across the chamber from the anode to the cathode.
 15. The method of claim 14, wherein Cu²⁺ ions are formed at the anode and deposited on the substrate.
 16. A method for the electroplating of semiconductor interconnects on a silicon substrate including the steps of: immersing the silicon substrate in an electroplating chamber containing an electrolyte solution; positioning a copper anode and a cathode in the electroplating chamber; mounting the silicon substrate on the cathode; and providing a current between the anode and cathode to effect the transfer of Cu²⁺ ions from the anode to a surface of the silicon substrate; wherein at least one of the following conditions are satisfied: a) the anode has a copper grain size of less than 100 microns; and b) the copper grains in the anode are oriented so as to be aligned perpendicular to a corroding surface of the anode.
 17. A method according to claim 16, wherein the anode has a phosphor content of between 0.045 and 0.060 weight percent and is formed from a copper cathode comprising at least 99.99% copper. 